(ISSN: 2349-2082)

International Journal For Ignited Minds
 Published Article
Design and Analysis of Parallel Prefix Adder for Reverse Converter
kavya s , & Amala M
This paper presents an efficient parallel prefix adder for reverse convertor. Residue number system is a non-weighted integer number representation system which is capable of supporting parallel, carry free and high speed arithmetic operations. Forward Convertor, modulo arithmetic unit and Reverse convertor are the main parts of the Residue Number System[1]. Reverse Convertor that is residue to binary convertor is complex structure and also it is based on the regular and modular parallel prefix adder. Nowadays the parallel prefix adders are not used even though it provides significant delay reduction and high speed operation because of higher power consumption. The novel specific hybrid parallel prefix based adder components that compensate the delay and power consumption in the existing system are applied. Different parallel adder structures are analyzed among that Brent-Kung prefix network is used for the parallel prefix addition because of the minimum fan-out.
Digital arithmetic, Parallel-prefix adder, Residue number system (RNS), Reverse converter.
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